Power dissipation and power efficiency are important operating characteristics of the radio frequency (RF) power amplifier of any RF transmitter. The more efficient the RF power amplifier is, the less expensive the transmitter is to operate, and the cooler and more reliably it runs. Since wireless communication systems of various types have become ubiquitous in society, it is important to maximize the efficiency of RF power amplifiers.
Unfortunately, much of the efficiency of a conventional RF power amplifier is lost due to the set drain voltage, which is constant regardless of signal level. It is known that for Class-AB amplifiers that drain efficiency rolls off with the square root of output power. This results in a severe efficiency penalty when processing signals with low average power and large peak-to-average power variation, such as CDMA, WCDMA or OFDMA signals.
For example, in normal operation (e.g., >99% of the time), the average CDMA or WCDMA signal power is low and the RF transmitter exhibits very low efficiency due to the high drain voltage of the RF power amplifier. The efficiency percentage is given by Equation 1 below:Efficiency(%)=100*(POUT/(VDRAIN*IDRAIN)).  [Eqn. 1]
However, during large signal peaks (e.g., <1% of the time), the power amplifier operates very efficiently due to the large output power (POUT in Equation 1). Unfortunately, this only occurs for a small fraction of the time. Using a fixed drain voltage, the level of the drain voltage must be set high enough to allow the envelope peaks to be amplified with minimal distortion. This means the drain bias voltage is set at an unnecessarily high level for most (>99%) of the signal envelope period, so that overall drain efficiency is very low.
Many different techniques for high efficiency RF and microwave amplifiers exist or have been proposed. These techniques include drain bias adaptation (or drain supply modulation) techniques. FIG. 1 is a schematic diagram illustrating selected portions of conventional RF transmitter 100, which uses drain bias adaptation (or drain supply modulation) according to the principles of the prior art. RF transmitter 100 comprises delay element 110, drivers 120 and 130, RF power amplifier 140, envelope detector 150, comparator 160, and switch 170. RF power amplifier 140 comprises input impedance (Zin) matching circuit 141, output impedance (Zout) matching circuit 142, laterally diffused metal-oxide-semiconductor field effect transistor (LDMOS) 143, quarter-wavelength (λ/4) drain feed 144 and bypass capacitor (CBP).
In FIG. 1, it is assumed that up-conversion circuitry (not shown) has already up-converted a baseband signal to an RF level to generate the input signal, RF IN. Envelope detector 150 compares the voltage envelope of RF IN to a predetermined threshold voltage, VT. When the RF IN signal is below the level of VT, comparator 160 generates an output control signal that causes switch 170 to select the low supply voltage, Vlow, which is thereby applied to RF power amplifier 140. When the RF IN signal is above the level of VT, comparator 160 generates an output control signal that causes switch 170 to select the high supply voltage, Vhigh, which is thereby applied to RF power amplifier 140. Thus, when the RF IN signal is small, RF power amplifier 140 operates efficiently due to the low drain supply voltage. When the RF IN signal is large, RF power amplifier 140 operates from the high supply voltage, also with high power efficiency due to the large output power being processed (see Equation 1).
In the RF transmit path, delay element 110 delays the RF IN signal to compensate for the processing time of envelope detector 150, comparator 160 and switch 170. Drivers 120 and 130 boost the power of the RF IN signal to a suitable level to drive RF power amplifier 140. LDMOS 143 is the power amplification transistor that drives the antenna (not shown) at RF OUT. The drain of LDMOS 143 pulls drain current from either the low supply voltage, Vlow, or the high supply voltage, Vhigh, through quarter-wavelength (λ/4) drain feed 144. Low-frequency modulation and noise are shorted to ground after the quarter-wavelength (λ/4) drain feed 144 by bypass capacitor CBP.
A high efficiency system in which the drain voltage supplied to a MESFET amplifier is switched between a +7 volt supply and a linearly variable 7-12 volt supply according to variations in envelope voltage is disclosed in “Microwave Power Amplifier With ‘Envelope Controlled’ Drain Power Supply,”, C. Buoli et al., 25th European Microwave Conf., September 1995, pp. 31-35. This system formed the basis for the patent “Linear Microwave Power Amplifier with Supply Power Injection Controlled by the Modulation Envelope,” World Intellectual Property Organization, International Publication No. WO 95/34128. However, the patent only covers switching between two fixed voltages, namely, +VA and +VB.
The same technique is described in “Microwave Power Amplifier Efficiency Improvement with a 10 MHz HBT DC-DC Converter”, G. Hannington et al., IEEE MTT-S Tech. Dig., 1998, pp. 589-592. Hannington uses a DC-DC converter to dynamically modify the RF amplifier drain voltage according to the time-varying envelope of a CDMA signal. The result is even greater efficiency due to the use of a high-efficiency switching regulator, as opposed to the linear regulated modulator disclosed by Bouli et al.
U.S. Pat. No. 6,492,867 to Bar-David, entitled “Method and Apparatus for Improving the Efficiency of Power Amplifiers Operating Under a Large Peak-To-Average Ratio” describes a system nearly identical to the Bouli patent, with the minor exceptions of a feedback loop for controlling the exact drain voltage and an automatic gain control amplifier for compensating the change in amplifier gain during the period when the drain receives the higher voltage.
However, these prior art RF power amplifier schemes all suffer from one or more drawbacks. The prior art amplifiers do not disclose a mechanism for discharging the large RF amplifier drain bypass capacitance. In all practical RF amplifiers, it is necessary to place low-frequency bypass capacitors between the RF power transistor drain and ground in order to prevent the low-frequency modulation and noise from interacting with the bias circuitry, thereby degrading adjacent channel power ratio (ACPR), intermodulation distortion (IMD), and associated memory effects (unsymmetrical ACPR/IMD). However, the prior art references do not disclose a method for quickly charging and discharging the bypass capacitance back to the previous voltage level.
Gain compensation during the period of high drain voltage also is an issue. The Buoli patent (International Publication No. WO 95/34128) does not mention a method of gain compensation. In the Bar-David patent (U.S. Pat. No. 6,492,867), a method of gain compensation during the period of high drain voltage is accomplished using an automatic gain control (AGC) amplifier. However, in commercial RF AGC amplifiers, the full-scale response time can be >500 nanoseconds or more, according to published data sheets (e.g., ADL5330).
Such a response time is too slow to compensate for the amplifier gain change during the pulsing period, which is only 10 to 100 nanoseconds, depending on modulation bandwidth. The exact timing required to compensate the amplifier gain change has a margin of error in the low nanosecond range, which is extremely difficult to realize using analog methods. The exact gain setting required for compensation is also difficult to meet due to the gain tolerance in AGC amplifiers.
Delay compensation of the drain modulation circuit also is a problem in the prior art RF power amplifiers. U.S. Pat. No. 6,492,867 makes no mention of a delay line. In International Publication No. WO 95/34128, an RF delay line is used to compensate for the delay of the drain modulation circuitry. However, practical RF delay lines are usually bulky coax cables, expensive filters, or extremely high loss integrated delay lines.
Therefore, there is a need in the art for an improved RF power amplifier using drain bias adaptation that overcomes the above-described shortcomings of the prior art. In particular, there is a need for a method of low-frequency bypass capacitor charging and discharging in an RF power amplifier using drain bias adaptation. There is a still further need for an RF power amplifier that more perfectly compensates the gain change during the period of high drain voltage. Finally, there is a need for an RF power amplifier using drain bias adaptation that implements a delay element that minimizes loss and is small and inexpensive.